In the fabrication of semiconductors, a number of different types of films are formed on the surface of a semiconductor substrate. These films may be organic polymer films, such as photoresists which are masking materials used to define the integrated circuit patterns, or they may be residues remaining after an etching operation, such as a post-etch polymer. Other types of films include multi-layer films comprised of both organic and inorganic materials. For example, some tri-layer films are used that have three different types of films: an organic polymer, a carbon-based film, and a silicon-containing film.
Many types of processes are used that result in films or residues left on the wafer edges. These processes include photoresist coatings, dielectric and metal deposition, plasma etching, and chemical mechanical polishing (CMP). Undesirable particles, residues and films are left on the wafer edges from these processes. The relevant surfaces include the top (or front), top bevel, apex, bottom bevel, and bottom (or back) edges of wafers. These edges are further specified in the International Standards published by Semiconductor Equipment and Materials International (SEMI) of San Jose, Calif. and referred to as the SEMI M1-1109 and SEMI M73-0309 specification documents.
During semiconductor manufacturing, wafers are transported from one machine to another in cassettes, and once in the machine, are moved in and out of chambers with robots. As a consequence, the films at the very edges of the wafers become abraded, cracked, and broken. Contamination, in the form of cracked portions of films, gets lodged onto vacuum chucks, robotic arms, and cassettes. The same flakes of photoresist and other edge-based films will be deposited onto the topside where there are active die, causing costly yield loss. Backside contamination will distort the wafer during subsequent imaging, also causing yield loss. Therefore, it is desirable to perform edge-cleaning operations on the edges of wafers.
One source of wafer edge defects is the formation of a photoresist edge bead, caused when the wafers are spin coated prior to lithographic imaging. A thickened ring of photoresist is left at the outermost top edge. Excess photoresist also runs down the sidewall or bevel edge of the wafer, and further runs under to the bottom edge. The photoresist bead on the top edge is easily cracked by robots handling the wafers, resulting in flakes of photoresist re-depositing on good die, causing yield loss. The photoresist on the wafer's bottom edge sticks to vacuum chucks, causing leveling problems in lithography, and creating more cracked flakes of photoresist. The same problem occurs with the photoresist left on the bevel and apex edges. Photoresist spin coating is repeated many times in the fabrication of an integrated circuit chip, depending on the number of lithographic levels used to make the device.
Another example is residue left behind from plasma etching. These etch residues are thin, tough films like halogenated polymers. They are deposited mainly at the wafer's bevel, apex, and bottom edges. They cannot be removed by conventional wet chemical means, and typically must be physically ground off with a grinder in combination with a fluid to make a slurry. This is a messy and particle-generating process that may leave more defects behind than were on the original wafer. If these etch residues are not removed, they will crack, break up and leave particles on good parts of the wafer, causing die loss. During wafer processing operations, robotic handlers, used to transport the wafers from one tool or operation to another, grip the edges of the wafers and cause cracking and flaking of the photoresist, etch residue films, and other films on the wafer edge. Particles will re-deposit on good portions of wafers and on process equipment, causing defects and loss of good die. These defects also contaminate the process equipment, leading to equipment reliability problems, and tool down time. Therefore, it is necessary to clean the edges of the wafers and remove these edge-based beads, residues, particles, and films in order to reduce wafer defects and maximize the yield of good die on every wafer processed.
Another example of an edge-cleaning problem is defects resulting from chemical-mechanical polishing (CMP) residue. CMP slurries flow around the apex of wafers and onto the bottom edges. These residues and particles migrate onto vacuum chucks, robotic handlers, and other wafer processing equipment.
Yet another example of an edge-cleaning problem arises from the use of silicon-containing photoresist. The silicon content can typically be up to 50% of the polymer content, and conventional removal methods, such as wafer edge exposure and development (WEE) or solvent cleaning, will not completely remove these silicon based films.
Finally, edge cleaning necessarily consumes some of the usable space or area on a wafer. This space is very significant, since gaining only 4 die per wafer, on a typical or medium-sized 10,000 wafer start/month line, will result in gained revenue of an estimated $40 million per year. Therefore, considerable effort is given to keep the edge cleaning area, called the edge exclusion, to a minimum. The International Technology Roadmap for Semiconductors (ITRS) specifies the parameters for integrated circuit production into the future, and the semiconductor industry companies follow this path. The ITRS, specifically in the area of edge exclusion, indicates the need to move from current 3-5 mm edge exclusion down to 1 mm or less in the next two years. Conventional wet edge bead cleaning methods are unable to control edge exclusion to this level due to the natural movement of liquids on smooth surfaces, such as a highly polished silicon wafer. It is recognized by those practiced in the art that a non-liquid means of edge cleaning is needed to meet the ITRS guidelines.